Analyze and Adopt
The provided material falls within the domain of Electrical Engineering and Metrology, specifically focusing on signal integrity, oscilloscope performance, and Analog-to-Digital Converter (ADC) characterization. To summarize this content, I am adopting the persona of a Senior Test and Measurement Engineer. My tone will be technical, precise, and focused on hardware specifications and signal performance metrics.
Abstract:
This technical assessment evaluates the low-signal linearity and vertical resolution of two digital storage oscilloscopes (DSOs) using a controlled step function. The test bench utilizes an arbitrary waveform generator (AWG) and a precision HP 355B manual attenuator to sweep signal amplitudes from 2V peak-to-peak down to the microvolt range. The primary objective is a comparative analysis of a 12-bit architecture versus a 14-bit architecture. While the 14-bit instrument offers superior theoretical vertical sensitivity (down to 100μV/division), the testing reveals significant gain inaccuracies and linearity deviations at high attenuation levels, suggesting potential ADC non-linearity or firmware calibration issues at the lower end of the dynamic range.
Comparative Analysis of Oscilloscope Vertical Resolution and Linearity
0:00-0:56 – Test Bench Configuration: The setup employs an arbitrary waveform generator (AWG) programmed with a step function, routed through an HP 355B attenuator (DC to 500 MHz). The attenuator provides 10 dB increments up to 120 dB, allowing for precise control over input signal amplitude for linearity testing.
1:04-1:44 – Baseline Measurement (0 dB): The initial signal is a 2V peak-to-peak square wave (-1V to +1V). Both oscilloscopes demonstrate consistent performance and accurate waveform reproduction at this baseline level.
1:47-2:30 – 20 dB Attenuation Check: Introducing 20 dB of attenuation results in a 10x reduction in amplitude, yielding a ±100mV signal. Both units maintain linearity and signal-to-noise ratio (SNR) integrity at this scale.
2:33-3:03 – 40 dB Attenuation Check: At 40 dB attenuation, the signal drops another factor of 10 to ±10mV. Waveform morphology remains intact across both instruments.
3:08-3:55 – 60 dB Attenuation & Bandwidth Limiting: With 60 dB attenuation (±1mV signal), the 12-bit oscilloscope hits its hardware vertical limit of 1mV/division. To manage increased noise floors at this sensitivity, a 20 MHz bandwidth limit is applied to stabilize the trace and resolve the stair-step function.
4:40-5:45 – Bit Depth vs. Sensitivity: The comparison highlights the 14-bit instrument's capability to reach 100μV/division, a 10x improvement over the 12-bit unit's 1mV/division limit. However, the 14-bit unit displays a noticeable DC offset error not present in the 12-bit unit.
6:05-7:20 – Linearity and Gain Discrepancies: Despite higher resolution, the 14-bit instrument exhibits "wrong" gain settings at low amplitudes, with the signal measuring -1.3V to +1.15V equivalent when it should be ±1.0V. This suggests the ADC is becoming non-linear at the bottom end of its range.
7:42-9:10 – High Attenuation Failure: At 80 dB attenuation (100μV target), the 14-bit unit displays significantly erroneous amplitude data ("way too big"). The engineer identifies this as a potential firmware bug or hardware limitation in the Keysight unit, whereas the 12-bit unit, though less sensitive, remains more accurate within its functional bounds.
Key Takeaway: High bit-depth (14-bit) does not inherently guarantee accuracy at extreme vertical sensitivities; ADC non-linearity and calibration errors can result in significant gain and offset discrepancies compared to well-calibrated 12-bit architectures.