This transcript would be best reviewed by a Group of Senior Hardware Systems Analysts and Semiconductor Industry Historians. This group possesses the technical depth to evaluate legacy GPU architectures and the economic context to understand the market-shifting implications of the ATI/AMD merger era.
Abstract:
This technical retrospective and teardown examines a rare engineering sample of the AMD ATI Radeon HD 4870 X2, a dual-GPU flagship from August 2008. The analysis situates the hardware at a critical juncture in industry history: launched two years after AMD acquired ATI and immediately preceding the 2008 financial crisis and the spin-off of AMD’s foundry business. The HD 4870 X2 was a significant market disruptor, forcing NVIDIA to enact substantial price cuts on its GTX 200 series.
The examination details the architectural strategy of "multiplying GPUs" (using two RV770 processors on a single PCB) rather than developing a single monolithic flagship. Technical features explored include the PLX PCIe switch, the ill-fated "Sideport" interconnect technology, and the inherent limitations of non-contiguous memory pools in multi-GPU systems. The physical teardown reveals engineering-specific hardware, such as diagnostic LEDs and DIP switches, alongside era-specific thermal solutions like coupled inductors and blower-style cooling. Functional testing highlights the instability common in pre-production silicon, characterized by driver corruption and display failures.
Hardware Analysis: ATI HD 4870 X2 Engineering Sample
0:00 Market Disruption: The retail version of the HD 4870 X2 was the fastest graphics card at launch, forcing NVIDIA to slash GTX 280 prices by $220 and GTX 260 prices by $110 to remain competitive.
0:46 Corporate and Economic Context: The card launched in August 2008, two years post-ATI acquisition and one month before the collapse of Lehman Brothers. AMD’s stock plummeted from ~$5.00 to ~$2.00 in the months following the launch, signaling a period of severe financial turmoil.
4:42 Technical Specifications: The production spec included a 750 MHz GPU clock, 1 GB GDDR5 per GPU (2 GB total), and a 286-watt TDP. It utilized two RV770 processors on a single PCB via a PCIe 2.0 x16 interface.
6:21 Multi-GPU Strategy: AMD opted to compete at the high end by doubling mid-range GPUs on a single board with a PLX PCIe switch, rather than producing a single massive flagship die—a strategy later seen in the RX 480 era.
8:11 The "Sideport" Interconnect: Early marketing emphasized "Sideport" technology, intended to increase interconnect bandwidth from 6.8 GB/s to 21.8 GB/s. However, AMD disabled this feature at launch due to minimal performance gains and increased production costs.
10:37 Memory Architecture Constraints: In this dual-GPU configuration, memory is not a single contiguous pool; GPU A cannot utilize GPU B's memory, effectively limiting usable VRAM to the capacity of a single GPU (1 GB) despite the 2 GB total physical presence.
12:00 Functional Instability: The engineering sample demonstrated significant reliability issues, failing to output display consistently and causing operating system corruption during driver installation attempts on Windows 8, 10, and 11.
13:33 Cooling and Thermal Design: The card utilizes a blower-style fan to push air over both GPU cores. The teardown reveals an aluminum backplate for rear-mounted memory and an aluminum baseplate with a fin stack featuring wider gaps over the PLX chip to reduce airflow resistance.
15:45 Engineering Sample (ES) Features: The prototype includes hardware not found on retail boards: diagnostic debug LEDs, unoccupied four-pin connector spots, and two DIP switches (labeled 1 and 2) used for low-level debugging.
PLX Multiplexer: A high-cost chip used to share PCIe lanes between the two GPUs.
Coupled Inductors: Specialized Vitec multi-phase SMD coupled inductors were used in the VRM, a design choice specific to the HD 4800 series.
Memory: Hynix GDDR5 modules (eight per GPU) provide the 1 GB per core capacity.
21:04 Die and Stepping: The GPU dies are marked with "Engineering Sample" and "B3 Stepping," indicating they were produced in the 18th week of 2008 (0818G) and diffused/made in Taiwan.
23:40 Historical Significance: This hardware represents the final flagship efforts before AMD entered a decade-long period of financial and architectural struggle (Bulldozer era) that lasted until the 2017 Ryzen launch.