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Abstract:
This tutorial demonstrates how to utilize STM32 C0 microcontroller peripherals, specifically timers and Direct Memory Access (DMA), to generate Pulse Width Modulation (PWM) signals and measure their characteristics without significant CPU core intervention. Using STM32CubeIDE and Low-Level (LL) libraries, the video guides through three steps: first, setting up Timer 1 to generate a basic PWM signal controlling an onboard LED; second, using Timer 16 and DMA to periodically update the duty cycle of the Timer 1 PWM signal, creating a fading effect; and third, configuring Timer 3 in Input Capture mode with DMA to measure both the period (frequency) and pulse width (duty cycle) of the generated PWM signal by capturing rising and falling edges. The process involves configuring clocks, timers, DMA channels, relevant GPIO pins, and requires a simple hardware modification (jumper wire) on the Nucleo board to loop the PWM output back to a timer input.
STM32 C0 Timers & DMA: PWM Generation and Measurement Tutorial
0:00 Introduction: The video aims to show how to generate PWM and measure its frequency/duty cycle using STM32 C0 timers and DMA, minimizing core load. This will be done in three steps.
0:41 Timer 1 Setup for PWM: Timer 1 is configured to generate a PWM signal on Channel 1, specifically targeting the onboard LED pin (requires pin remapping). Low-Level (LL) libraries are selected over HAL.
1:23 Clock Configuration: The microcontroller's system clock is set to 48 MHz using the internal HSI48 oscillator.
2:49 Step 1 Configuration (1 Hz PWM): Timer 1 is configured with a prescaler (4799) and counter period (9999) to achieve a 1 Hz frequency from the 48 MHz clock. The pulse value is set for a 50% duty cycle (5000).
3:49 Step 1 Test & Verification: Code is generated, copied, built, and downloaded. Successful execution results in the onboard LED blinking slowly at 1 Hz.
4:15 Step 2 Goal (Dynamic Duty Cycle): Introduce Timer 16 and DMA to periodically update the Timer 1 duty cycle. Timer 16 will provide timing, and DMA will transfer new duty cycle values from memory to Timer 1's Capture/Compare Register (CCR1).
5:15 Step 2 Configuration: Timer 1 frequency is increased to 1 kHz (prescaler 47, period 999). Timer 16 is set up to trigger updates at 2 Hz (prescaler 4799, period 4999). DMA channel is configured for Timer 16 update event (memory-to-peripheral, word size, circular mode).
5:56 Step 2 Code Implementation: An array holding different duty cycle values is defined. Initialization code for Timer 16 and its associated DMA channel is added and started.
7:05 Step 3 Goal (PWM Measurement): Configure Timer 3 to measure the period and pulse width of the PWM signal generated by Timer 1 using Input Capture and DMA. The "Combined Reset Trigger Mode" is employed.
8:19 Step 3 Configuration: Timer 3 is set up with a 1 MHz counting frequency (prescaler 47). Input Capture is configured on Channel 1 (rising edge, direct mode) and Channel 2 (falling edge, indirect mode), both triggered by the same input pin (TI1FP1). Two DMA channels are set up (peripheral-to-memory, half-word, circular) to capture the timer values on each edge event.
9:19 Hardware Modification: A physical jumper wire is required on the Nucleo board (CN10, Pins 11 to 13 suggested) to connect the Timer 1 PWM output pin to the Timer 3 Input Capture pin (PA6).
9:45 Step 3 Code Implementation: Variables are declared to store the captured values from DMA. Initialization code for Timer 3 and its two DMA channels is added and started.
10:30 Debugging & Verification: The application is built and run in debug mode to observe the capture_ch1 (period) and capture_ch2 (pulse width) variables being updated automatically by DMA, confirming the measurement works as expected.