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Abstract:

This video documents extensive experiments aimed at developing a low-noise amplifier stage suitable for a parallel crystal oscillator configuration, intended as an alternative approach to phase noise reduction compared to previously explored cascaded filters. The core focus is the iterative design, testing, and optimization of a low-input-impedance amplifier circuit centered around a BFR91A transistor and a custom-wound transformer. Key investigations include impedance matching, selection of passive components (metal film resistors proving superior to carbon film), transistor choice and operating conditions (including the benefits of cooling), the critical impact of RF base decoupling on phase noise, and detailed transformer design using different core materials, winding techniques, and core stacking, encountering challenges with enamel insulation integrity. Noise performance is evaluated throughout using Allan deviation (TinyPFA), phase noise measurements (PN2060, Linrad), and noise figure analysis, revealing significant improvements but also highlighting potential measurement system artifacts. The video concludes with a refined amplifier design deemed ready for implementation in a three-channel parallel crystal oscillator system planned for a future video.

Detailed Amplifier Optimization for Low-Noise Parallel Crystal Oscillators

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