This video documents the Tiny Tapeout 7 bring-up party, an online event where ASIC designers showcase their projects fabricated on the Tiny Tapeout 7 shuttle. Hosted by Matt Venn, the session features live demonstrations of several designs, predominantly focusing on 2D/3D graphics rendering engines, including raycasters and rasterizers, developed in Verilog and custom HDLs like Celis. Other notable projects include a RISC-V System-on-Chip (SoC) capable of playing audio, a run-length encoded video player displaying "Bad Apple!!", and simpler introductory ASICs. The event highlights the creativity and technical achievements of the Tiny Tapeout community, with developers discussing their design processes, challenges (like data corruption or timing violations), and the tools and development boards utilized.
Tiny Tapeout 7 Bring-Up Party: Showcasing Community ASIC Designs
0:00:05 Welcome & Introduction: Matt Venn kicks off the Tiny Tapeout 7 bring-up party, an event for designers to demonstrate their ASICs.
0:01:35 Anton's Raybox Remixed: Anton presents "Raybox Remixed," a raycasting engine (design #714).
0:02:46 Details: An improved version from Tiny Tapeout 4, this iteration fixes synthesis glitches and works with the tiny VGA mod. It features generated textures, a debug overlay, and a demo mode.
0:05:38 SPI Control & External Textures: The design uses SPI interfaces for camera and visual effect control, and supports external 64x64 pixel textures (6-bit RGB222) from a QSPI flash, demonstrated by flashing a "Lenin-esque" general image generated by ChatGPT.
0:09:03 Timing Fix: A 10nF capacitor was used to fix an SPI clock timing violation for texture reading.
0:10:00 PC Control: A Python utility allows PC keyboard/mouse control for first-person navigation.
0:11:41 Hardcoded Map: The 32x32 map is currently hardcoded using bitwise operations; collision detection is handled by the host PC. All math is fixed-point.
0:11:25 Resources: Notes available at algo.org/tto7.
0:16:14 Sylvian's Terrain Raycaster: Sylvian showcases his terrain raycaster, resembling the game "Comanche."
0:16:58 Custom HDL: This is his first Tiny Tapeout design, implemented in his own HDL, "Celis" (cis-hdl.org).
0:17:28 Data & Flashing: Requires 5MB of external data (including screen init sequence and precomputed 1/Z values), flashed using a modified tool. It's a 2-tile design.
0:19:00 Functionality: Renders a 320x240 terrain, controllable via inputs. It works up to 17MHz. The algorithm casts rays per screen column, avoiding hardware division by using precomputed 1/Z tables for perspective.
0:24:35 Matt's 16-Tile 3D Rasterizer: Matt (not Venn) demonstrates his 3D graphics rasterizer.
0:25:51 On-Chip Processing: Utilizes all 16 tiles to render up to 2 polygons with solid shading, lighting, and transformations, all performed on-chip at 60 FPS.
0:26:15 Textures & Control: Includes two ROMs for textures (e.g., Tiny Tapeout logo, his Thai school logo) and receives vertex/scene data via UART from a PC Python script (30 bytes/frame).
0:27:33 Challenges: Initially faced UART data corruption issues with the ASIC. The design uses extensive fixed-point arithmetic and was developed in Verilog, simulated with Verilator, and tested on a Basys 3 FPGA.
0:32:52 Chip Imagery & Acknowledgements: Matt Venn displays the Tiny Tapeout 7 substrate images from Texplained, pointing out various designs, including analog blocks. He thanks eFabless for sponsoring the shuttle (TT7 being the last with them).
0:38:26 Emory's Triangle Rasterizer & Audio Visualizer: Emory presents his 8-tile project featuring fast triangle rasterization.
0:38:44 GPU-like ASIC: Renders four triangles at a theoretical 60 FPS, controlled via a simple 1MHz SPI protocol, with data updates during VGA blanking intervals.
0:39:23 Audio Visualizer Demo: Showcases a demo where an electret microphone's audio is processed by an RP2040 (FFT) to drive the ASIC, visualizing audio as bars on a screen.
0:39:45 Current Limitations: Notes issues with anti-aliasing and the RP2040's ADC speed in MicroPython for full audio bandwidth. The design itself (triangle rendering) works well.
0:46:09 Logic Destroyer's RISC-V Audio Project (shown by Matt Venn): A project by Logic Destroyer (ID 588 on TT7, "canvas_riscv_rv32e_soc") is highlighted.
0:48:32 Functionality: A RISC-V SoC that plays audio via PWM output, controlled by MicroPython. (Note: A separate, larger MicroLinux-capable RISC-V by Logic Destroyer was mentioned from Twitter but was not on TT7).
0:48:52 Stuart & Lizzy's "Secret L" ASIC: Matt Venn demonstrates a simple first ASIC by Stuart (from the Tiny Tapeout team) and his daughter Lizzy.
0:49:44 Feature: Activating input 2 displays a letter "L" on the 7-segment displays.
0:50:48 Mike Bell's "Bad Apple!!" Player: Matt Venn shows a project by Mike Bell.
0:51:14 RLE Video Player: The ASIC plays a run-length encoded version of the "Bad Apple!!" music video. The 16MB RLE data was pre-flashed to QSPI.
0:53:22 Smooth Playback: The demo shows impressively smooth video playback on the connected screen.
0:54:16 Wrap-up & Future: Matt Venn thanks the participants and apologizes for the event's delay. He anticipates future bring-up parties, possibly with a different format for IHP chip designs.