This presentation by Brian Stewart details his ongoing ENIAC simulator project, implemented in Go and running on a Raspberry Pi utilizing Plan 9. The core focus is on the hardware interfaces developed for user interaction and visualization. Stewart demonstrates a 3D-printed replica of the ENIAC's portable control box, which connects to the Raspberry Pi via GPIO to emulate original machine operations, including distinct clocking modes (continuous, single add time, single pulse) and function buttons (clear, start). The simulator's state is visually represented on a 16x64 LED matrix, driven via SPI with a multiplexing scheme. Stewart discusses the technical challenges encountered in achieving a smooth and consistent display refresh, detailing how limitations of traditional time-shared processes led to the adoption of Plan 9's real-time scheduling and, ultimately, a custom kernel device driver for more robust performance. The talk concludes with reflections on the historical parallels between the ENIAC's inherent parallelism and modern multi-core computing architectures, outlining future research into optimizing real-time process scheduling through CPU core dedication.
Exploring the ENIAC Simulator on Raspberry Pi with Plan 9: Control and Display
0:01 The ENIAC Simulator Project: Brian Stewart, a faculty member at Drexel University and a long-time member of the Plan 9 community, introduces his ENIAC simulator project, developed in Go and running on a Raspberry Pi, stemming from his research into the historical ENIAC computer.
0:53 ENIAC Control Box Replication: Stewart showcases a 3D-printed, 1/8 scale model of the ENIAC's portable control box, which replicates the original's functionality and connects to the Raspberry Pi via GPIO lines.
3:54 Control Box Functionality: The replica control box includes a three-position toggle switch for different clocking modes (continuous, one add time for single-instruction-like steps, and one pulse for 100 kHz clock steps) and four push buttons for operations like clearing accumulators or initiating computations.
8:55 LED Matrix Display: A 16x64 LED matrix is used to visualize the ENIAC's internal state, driven by the Raspberry Pi via SPI and multiplexing rows to achieve a seemingly stable display. Each vertical column represents a digit (0-9) within an accumulator, with an additional pair for the number's sign.
13:55 Display Refresh Challenges: Stewart describes issues with display refresh, including dimness when LEDs were off most of the time in periodic refresh, and flickering when the display update process ran as a compute-heavy time-shared process alongside the simulator.
16:06 Real-Time Scheduling and Kernel Driver Solutions: To address flickering, Plan 9's real-time scheduling was employed, which improved stability but still showed occasional issues under heavy system load. The most robust solution involved developing a minimal kernel device driver that uses polling for SPI communication, having negligible CPU impact.
26:46 Future Research on Real-Time Performance: Stewart outlines future work to investigate Plan 9's scheduler preemption behavior and proposes reserving a dedicated CPU core on the Raspberry Pi for real-time processes and interrupt handling to ensure consistent display updates.
37:39 Historical Parallelism: Stewart draws parallels between the ENIAC's inherently parallel architecture (with its 20 concurrently operating accumulators) and modern multi-core computing, noting the historical challenge of managing parallelism that is now highly relevant again.