This video discusses the surprising and critical role of High Bandwidth Memory (HBM) in achieving automotive safety integrity level D (ASIL D) compliance for self-driving car systems, as revealed by a presentation from a Mercedes engineer at the ISSCC conference. The speaker, François Pierrel (formerly of Intel), explains that unlike traditional DDR and LPDDR memory, HBM offers built-in failover capabilities essential for automotive applications, where any single point of failure can have catastrophic consequences. This HBM feature allows a system to continue operating at full performance even if individual memory links fail, critical for the long operational lifespan of vehicles. The discussion highlights that this requirement for HBM could create an immense demand that current global HBM production, supplied by only three major companies and already sold out, is wholly unprepared to meet, potentially necessitating a significant ramp-up in manufacturing capacity and new players in the HBM market.
Summarizing the Transcript: HBM, Mercedes, and the Future of Self-Driving Cars
0:03 The Scarcity of High Bandwidth Memory (HBM): HBM is a powerful resource for capacity and bandwidth, but it's made by only three companies and is largely sold out for years to come.
0:56 Unconventional Insights from Conferences: The speaker attended the International Solid-State Circuits Conference (ISSCC) and found unexpected "nuggets" of information during a seemingly dry educational session on circuit techniques and chiplets.
2:13 Mercedes' Automotive Chip Development: François Pierrel, a former Intel system architect, is now leading Mercedes' efforts to build ASIL D-compliant self-driving System-on-Chips (SOCs), adhering to stringent automotive safety standards where human safety is paramount.
4:12 Automotive vs. Other Industries' Failure Handling: Unlike consumer electronics (laptops, smartphones) where hardware failures are less catastrophic, and even server mainframes (like IBM Z) which rely on extensive redundancy, automotive chips require specialized silicon design to manage failures without compromising safety.
5:55 Segmentation of Dependencies: Mercedes' approach involves carefully segmenting computational dependencies in hardware and software to ensure that a failure in one part (e.g., a chair's heat sensor) does not affect critical self-driving functions.
8:01 The Need for Automotive-Grade UCIE: Mercedes' self-driving chip (MSOC) will use UCIe (Universal Chiplet Interconnect Express) for internal communication, requiring an automotive-grade version of the standard that includes failover capabilities for chiplet links.
9:25 HBM as a Mandatory Component for ASIL D: Surprisingly, François Pierrel stated that traditional DDR and LPDDR memory are insufficient for ASIL D compliance due to their catastrophic failure modes (a single channel failure can down the entire controller).
11:22 HBM's Unique Failover Mode: HBM supports a "failover mode" allowing it to remain fully operational even if some of its numerous channels fail. This feature enables wear leveling and the seamless removal of faulty links from the operational pool, crucial for the 10-20 year lifespan of automotive components.
12:13 Unforeseen Supply Chain Implications: The revelation that HBM is essential for ASIL D certification suggests that current self-driving solutions without HBM might not meet these standards. If HBM becomes standard for self-driving cars, the global supply (currently limited to three vendors) would be vastly inadequate, necessitating a massive increase in production and potentially new manufacturers.
14:07 The Value of Niche Conferences: The speaker emphasizes that attending highly technical conferences often yields unexpected and impactful insights that go beyond marketing narratives, providing valuable "nuggets" for engineers.