This episode of the "Open-Source Silicon Stream," hosted by Matt Venn, features special guest Mike Bell (Rebel Mike) to announce a new competition/collaboration for the Tiny Tape Out platform. The stream begins with news updates, including the successful Tiny Tape Out workshop at Swiss Chips, the opening of new IHP and Skywater shuttles, and a major announcement that Tiny Tape Out will be adding support for GlobalFoundries 180nm.
The main segment introduces a competition to design peripherals for Mike Bell's open-source RISC-V microcontroller, TinyQV. The goal is to create a community-built, "crowdsourced" microcontroller by integrating numerous user-submitted peripherals into a single large ASIC, which will be taped out for free on an upcoming shuttle. Mike Bell explains the two types of peripheral templates (a simpler "byte" version and a "full" version with interrupt support) that participants will use to develop and test their designs. The stream covers the technical details of the peripheral bus, IO management via a multiplexer, testing procedures, and submission via a pull request.
Building a Community-Sourced RISC-V Microcontroller: The TinyQV Competition
0:00:05 Introduction: Host Matt Venn introduces the open-source silicon stream (Episode 17) and special guest Mike Bell, who will discuss a new Tiny Tape Out competition.
0:02:24 Tiny Tape Out Shuttle Updates: Matt provides updates on current tape-out opportunities:
The IHP 130nm shuttle is open for 49 more days.
The Skywater shuttle (via chipfoundry.io) is open for 63 more days.
0:05:31 Major News: GlobalFoundries Support: Tiny Tape Out has started work to add support for GlobalFoundries' 180nm process. This third foundry option adds resilience to the supply chain. The initial work is sponsored by Titus.
Alexander Morvinc has updated his GDS viewer to include a live, explorable 3D view of a running chip design.
The official Chip Viewer has been updated with decap images and GDS layers for Tiny Tape Out 7, allowing for detailed exploration of the submitted projects.
0:09:42 ORConf 2025 Announcement: The Open-Source RISC-V & Digital Design Conference (ORConf) is announced for September 2025 in Valencia, Spain. Registration and talk submissions are now open.
0:13:05 Introducing the TinyQV Core: Guest Mike Bell discusses his TinyQV, a 4-bit serial RISC-V processor designed for Tiny Tape Out 6. It reads its program from external QSPI flash, making it suitable for the on-chip RAM constraints of Tiny Tape Out.
0:14:29 The Competition: A Crowdsourced Microcontroller: The stream officially launches a competition to build a feature-rich, open-source RISC-V microcontroller by having the community design peripherals for TinyQV. All winning entries will be integrated into a single large chip.
0:17:02 Timeline and Cost: The competition will target the Skywater 25A shuttle, closing around September 1st. Entry is free, though participants who want a physical copy of the final chip will need to purchase a dev kit.
Participants use one of two Verilog-only templates: a simple Byte Peripheral (1 tile, 16-byte address space) or a Full Peripheral (up to 2 tiles, 32-bit access, interrupt support).
The templates include an SPI wrapper for standalone testing with the standard Tiny Tape Out infrastructure.
Submissions are made via a pull request to the competition's GitHub repository.
0:36:29 IO Management: The final chip will use an IO multiplexer, allowing the main program to assign output pins to specific peripherals at runtime to prevent conflicts. All input pins are visible to all peripherals simultaneously.
The standard UART pins (out 0, in 7) should be avoided to facilitate testing with MicroPython.
An official Tiny Tape Out FPGA board is in development, but for now, the Pico Ice is a recommended off-the-shelf option for FPGA testing.
0:58:32 Judging Categories: Prizes will be awarded for categories including best documented, best tested, best demo video, most unusual, and community favorite.