This technical presentation provides a comprehensive overview of the General Purpose, Advanced Control, and Basic Timers (GPTIM) available on the STM32 H7 series of microcontrollers. It details the scalable and versatile architecture of the timers, which allows them to handle a wide range of tasks from simple time-basing to complex waveform generation, significantly offloading the CPU. The session covers fundamental concepts such as various clocking schemes, counting modes (up, down, center-aligned), and period management using pre-scalers and auto-reload registers.
Key functionalities like Input Capture for measuring external signals and Output Compare for generating precise events and PWM signals are explained in depth. The presentation also delves into advanced features, including cascading timers to create larger time-bases, specialized motor control functions like dead-time insertion and six-step commutation, and the critical break function for hardware safety. The integration of timers with other peripherals, including synchronized ADC triggering and efficient data handling via DMA burst mode, is thoroughly examined. Finally, the video provides practical formulas, an LED dimming application example, and common troubleshooting tips to aid developers.
An In-Depth Guide to STM32 H7 Timers (GPTIM)
0:01:56 Key Features & Versatility: STM32 timers are based on a versatile and scalable architecture designed to offload the CPU from time-critical tasks. They can be used for software time-bases or hardware tasks like generating waveforms and measuring signals.
0:05:02 Timer Architecture: The core of a timer consists of a 16-bit or 32-bit counter, an auto-reload register (ARR) to define the period, and capture/compare registers (CCR) for input measurement or output generation.
0:06:14 Clocking Schemes: Timers can be clocked by multiple sources: the internal APB bus, external trigger pins (ETR), other on-chip timers, or quadrature encoders for position sensing.
0:10:05 Counting Modes: Timers support multiple counting directions: up, down, and up/down (center-aligned). Center-aligned mode is crucial for motor control as it reduces acoustic noise and switching losses.
0:13:01 Input Capture: This mode is used to measure the properties of an incoming signal, such as its period or duty cycle. It includes features like a digital filter to reject noise and a pre-scaler to reduce CPU load with high-frequency signals.
0:15:29 Advanced Capture Modes: The timers offer specialized capture modes, including PWM Input mode, which uses two channels to simultaneously measure the period and duty cycle of a PWM signal, and Clear on Capture, which resets the counter to allow for direct period measurement.
0:18:57 One-Pulse Mode: This mode is used to generate a single, precisely timed pulse of a programmable length in response to an external trigger event.
0:22:06 Advanced PWM Modes: The timers can generate asymmetric PWMs for higher resolution control and phase-shifted PWMs required for certain DC-DC converter topologies. They also feature combined PWM modes that can logically AND or OR two signals to create complex waveforms.
0:26:26 Cascading Timers: Multiple timers can be linked in master/slave configurations. This allows for creating timers with larger bit-widths (e.g., a 48-bit timer from three 16-bit timers) or synchronizing the start of many PWM channels.
0:34:34 Motor Control Features: Advanced timers include specific features for electric motor control, such as dead-time insertion, six-step (block) commutation for brushless DC motors, and interfaces for Hall sensors and quadrature encoders.
0:35:52 Dead-Time Insertion: A critical hardware feature that automatically inserts a small delay between switching complementary PWM outputs. This prevents "shoot-through" (a short circuit) in half-bridge power stages used in motor drivers and inverters.
0:40:19 Break Function: This is a hardware safety mechanism that can asynchronously disable PWM outputs and force them into a pre-configured safe state (e.g., high-impedance or all low) in response to a fault signal, protecting the power hardware.
0:43:38 ADC Triggering: Timers can generate precise triggers for the Analog-to-Digital Converter (ADC). This synchronization is essential for applications like motor control, where current must be measured at specific points in the PWM cycle to avoid switching noise.
0:49:39 DMA Burst Mode: Timers can trigger a DMA request to update multiple timer registers (e.g., frequency and duty cycle for several channels) in a single, efficient burst transfer, minimizing CPU intervention for real-time parameter changes.
0:51:54 Debugging Support: The timer's behavior during a CPU breakpoint is configurable. It can be set to halt, preventing uncontrolled operation of connected hardware like motors, which is a crucial safety feature during development.
0:59:32 Common Pitfalls & Tips: A frequent issue is the absence of PWM output despite correct configuration. This is often because the main output enable (MOE) bit or the channel-specific capture/compare enable (CCxE) bit has not been set.