This video critically examines the impact of compiler selection and development environment on the performance of the Raspberry Pi RP2350 microcontroller, specifically comparing its Arm Cortex M33 and RISC-V Hazard 3 cores. Initially, the RISC-V core exhibited surprisingly poor floating-point performance compared to both the Cortex M33 (with FPU) and even the older Cortex M0+, a discrepancy attributed by a core designer to the sub-optimal soft-float library provided by the default Windows/VS Code toolchain. Through a series of experiments, the presenter demonstrates that manually installing the SDK and a highly optimized GCC compiler on Linux dramatically improves RISC-V's floating-point performance and general benchmarks. Crucially, this optimized setup also significantly boosts the Cortex M33's performance, allowing its hardware FPU to achieve its full potential. The video concludes by strongly advising against using the convenient VS Code extension for performance-critical projects, advocating instead for manual SDK and toolchain installation on Linux to unlock the RP2350's maximum capabilities across both architectures.
Compiler Choices: Unlocking RP2350 Performance
0:00 Unexpected Focus on Compilers: This video, an unplanned addition to a series comparing Cortex M33 and RISC-V Hazard 3 cores in the RP2350, highlights how compiler choices critically affect performance, especially for the new RP2350-based boards.
0:53 Initial N-Queens Benchmark: The RP2350 (both Arm and RISC-V cores) was initially found to be twice as fast as the RP2040 (Cortex M0), completing the N-Queens benchmark in 20 seconds compared to 40 seconds.
The Cortex M33 was 5 times faster than the RP2040 due to its hardware Floating Point Unit (FPU).
However, the RISC-V core was unexpectedly 26 times slower than the Cortex M33 and even slower than the Cortex M0 for floating-point operations.
2:39 Root Cause Identified by Core Designer: Luke Ren, the engineer who designed the RISC-V cores, explained that the RP2040 uses highly optimized software float code in its ROM, while the RISC-V cores, when compiled with the default Windows/VS Code (Core-V) toolchain, used a generic soft-float library missing crucial bit manipulation instructions.
3:30 Complex Development Environment: The video details the complicated landscape of development, including three host operating systems, two CPU architectures, and various compiler options (GCC v13/14, LLVM/Clang, Core-V GCC), where the specific compiler build and settings significantly impact performance.
5:33 Transition to Linux and Manual Toolchain: The presenter switched to Linux and manually installed the Pico SDK and toolchain via the command line. He also specifically compiled GCC 14.2.1 with all relevant Hazard 3 RISC-V extensions (e.g., zba, zbb) to achieve optimal performance.
6:39 Dramatic RISC-V Floating Point Improvement: With the optimized Linux setup, RISC-V floating-point performance surged from 1.9 Whetstones to 25 Whetstones, now surpassing the Cortex M0 for these tasks.
7:22 General Benchmarks Also Improve for RISC-V: The N-Queens and custom Ocean 2 encryption benchmarks also showed significant speedups for RISC-V, making it competitive with, or even faster than, the Cortex M33 for these tasks.
8:57 Arm Performance Boosted on Linux Too: Re-testing Arm using the manual Linux SDK/toolchain installation also yielded improved results for N-Queens and Ocean 2, closing the performance gap with RISC-V.
9:47 Cortex M33's Full Potential Unleashed: When compiled with the fully optimized Linux setup, the Cortex M33's Whetstone performance leaped to an astounding 263, demonstrating the massive advantage of its hardware FPU when properly utilized by the compiler.
The RP2350 is generally 1.5 to 2 times faster than the RP2040.
The Cortex M33 (with its FPU) is 26 times faster than the Cortex M0 and 10 times faster than the Hazard 3 RISC-V for floating-point operations (when optimized).
Crucial Recommendation: For maximum performance, users must install the SDK and toolchain manually via the command line on Linux. The convenient VS Code extension, while easy to use, provides sub-optimal compiler configurations for both Arm and RISC-V, significantly limiting the chip's potential.