John Nekerbacher, a researcher at IBM, provides an overview of co-packaged optics, a critical technology being developed to address the communication bottleneck in future AI data centers. As compute power accelerates faster than the ability to share data between chips, co-packaged optics offers a solution by integrating high-bandwidth optical communication directly onto compute modules. The video details the entire development process, from the design of Photonic Integrated Circuits (PICs) and high-density polymer waveguides to their assembly using thermal compression bonding. A significant focus is placed on reliability, showcasing the rigorous JEDEC thermal shock testing used to validate the components. The process concludes with lab-based optical characterization to measure performance metrics like insertion loss, ensuring the technology is robust and efficient enough for next-generation AI and high-performance computing applications.
IBM's Vision for AI: A Deep Dive into Co-packaged Optics
0:00:09 The AI Bottleneck: As AI algorithms demand more compute power, the electrical connections used to share data between chips are becoming a major limitation. Compute capabilities are advancing faster than the communication links can support.
0:01:12 The Solution: Co-packaged Optics: This technology integrates optics directly onto compute modules to create high-bandwidth, energy-efficient communication channels. By bringing light closer to the chip, it allows for more connections along the chip's edge (high "beachfront" density) and the use of multiple colors (wavelengths) to further multiply bandwidth.
0:03:08 Photonic Integrated Circuits (PICs): The core of the system is the PIC, a specialized chip with both electrical connections (via solder bumps) and optical waveguides. These on-chip optical channels are fabricated at a 50-micron pitch—about half the width of a human hair—enabling extremely high-density data transfer.
0:04:58 High-Density Polymer Waveguides: Flexible polymer "sheets" containing precisely matched waveguides are used to link the dense PIC to standard glass fibers. The waveguides on the polymer fan out from a tight 50-micron pitch to a coarser pitch, allowing them to connect to pluggable, long-distance fiber optic cables.
0:05:50 Precision Assembly: The PICs are attached to the package substrate using a thermal compression bonder. This specialized tool applies precise heat and pressure to create a robust solder connection between the chip and the package.
0:06:49 Proving Reliability with JEDEC Testing: To ensure the technology is product-ready, the assembled modules undergo harsh JEDEC stress tests. This involves cycling them through extreme temperatures (e.g., -40°C to 150°C) hundreds or thousands of times to prove the optical connections can withstand thermal shock and remain reliable.
0:09:12 Measuring Performance: In the lab, fully assembled modules are tested to characterize their optical performance. By sending a 1310nm laser through the module and measuring the output, engineers can calculate the signal loss (insertion loss). A good sample shows a low one-way loss of around 2.3 dB, confirming a high-quality connection.
0:11:43 The Future of AI Interconnects: This entire process validates co-packaged optics as a reliable, high-performance solution for future AI data centers. IBM continues to develop next-generation versions to further reduce energy consumption and increase bandwidth density for both internal and industry-wide applications.