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Abstract:

This presentation addresses the critical challenge of hardware inefficiency in building fault-tolerant quantum computers, where millions of physical qubits may be required for complex algorithms like Shor's. The speaker, Takahiro, an experimentalist, advocates for leveraging hardware-specific noise characteristics and internal degrees of freedom to improve physical error rates.

The talk explores bosonic encoding as a solution, focusing on two main approaches: the Cat Code and the Dual-Rail (DRL) Qubit, implemented in harmonic oscillators (microwave cavities). The Cat Code encodes logical information in superpositions of coherent states, utilizing changes in photon number parity to detect photon loss errors, and has demonstrated "break-even" logical qubit lifetimes. The DRL Qubit encodes logical states using single-photon states across two cavities, uniquely transforming common T1 (relaxation) errors into easily detectable "erasure" errors. This leads to a higher effective code distance and error threshold, significantly improving logical error suppression and simplifying control compared to cat codes. Recent experimental results with DRL qubits show very high fidelities for single and two-qubit operations, highlighting its potential for hardware-efficient quantum computation.

Hardware-Efficient Quantum Error Correction: A Deep Dive into Bosonic Encoding

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