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Abstract:

Zero ASIC, a semiconductor startup, announces the release of Wildebeest, a new open-source FPGA synthesis tool designed to deliver the world's highest performance. The tool addresses the significant "Quality of Results" (QoR) gap that has historically existed between free, open-source tools like Yosys and proprietary, vendor-locked solutions. Wildebeest incorporates advanced, industrial-grade optimization techniques, such as using circuit size to select appropriate algorithms and leveraging advanced features of the ABC logic synthesis library. Led by Dr. Thierry Besson, a 30-year industry veteran, the project brings previously proprietary methods into the open-source domain. Benchmark results on the picorv32 CPU design demonstrate that Wildebeest surpasses both proprietary and existing open-source tools in performance, achieving lower logic depth and area (LUTs). The project's long-term goal is to create an "LLVM for synthesis," fostering a high-performance open-source ecosystem for hardware design.

Wildebeest: An Open-Source Tool to Revolutionize FPGA Synthesis

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