Exploring Voltage Control in Digital Designs on Tiny Tapeout
0:00:10 Introduction: Matt Ven, the host, introduces the fourth episode of the open-source silicon stream, focusing on building a voltage-controllable digital block.
0:01:00 News and Updates: The Tiny Tapeout 6 bring-up party, with around 30 participants and 10-12 designs showcased, is highlighted. A lightly edited recording is available on the channel with timestamps.
0:01:35 Tiny Tapeout News: Mentions of community projects using "Spade" and other hardware description languages.
0:03:49 Upcoming Events: The host discusses the Open Source Hardware Camp 2024 in Denmark and Hackaday Berlin 2025, where a Tiny Tapeout workshop will be conducted.
0:05:01 Demo Scene Competition: A new game category is introduced, featuring a standardized game controller P-mod developed by Pat and Uri.
0:06:43 Main Topic: Voltage Controllable Digital Block: The main focus is to create a digital design where the supply voltage can be adjusted to observe its effects.
0:07:13 Challenges: Directly controlling the Vcore in Tiny Tapeout is not feasible, as it affects the entire multiplexer infrastructure.
0:08:24 Proposed Solution: The plan is to place the digital design within an analog block, powering it through the separate 3.3V analog supply (VDDA) to allow voltage control.
0:08:53 Demonstration: The host demonstrates the concept using the demo board, showing the separate VDDIO, Vcore, and VDDA power supplies.
0:10:44 Design Process: The host starts building the digital block, aiming for a small, simple design connected to the 3.3V rail and analog iOS.
0:13:28 Design Considerations: The digital block will use 1.8V standard cells, making it potentially "self-destructing" if directly enabled. Safety measures are discussed.
0:14:46 Level Shifting Discussion: The community suggests using level shifters, but the host opts for utilizing the existing analog system for simplicity.
0:18:40 Design Implementation: The host begins implementing the design using a template and a simple counter example.
0:28:05 Magic Design: The host switches to the "magic" tool for layout and connects the digital block to the analog components.
0:38:45 Design Challenges: The host encounters DRC errors and LVS issues while connecting and configuring the design.
0:54:57 Design Limitations: The community points out that the analog switches might stop working before the logic due to the higher VT of 3.3V transistors.
1:08:29 Conclusion: The host acknowledges the limitations and suggests revisiting the design with level conversion and digital IO in the next episode.
1:08:59 Closing Remarks: The host thanks the viewers, encourages engagement, and previews the next stream's focus on resolving the LVS and level conversion challenges.