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Abstract:

This presentation by David covers the engineering principles behind building low-latency trading systems in C++. The talk begins with the core problem of optimizing an "order book" data structure, demonstrating a journey from intuitive but inefficient std::map implementations to a highly optimized, hardware-aware linear search. This process highlights key principles such as avoiding node-based containers, understanding the specific properties of the data, and leveraging profiling tools like perf to diagnose bottlenecks like branch misprediction.

The discussion then broadens to system architecture, advocating for kernel-bypass networking and shared memory for high-speed inter-process communication. A significant portion is dedicated to designing and optimizing a lock-free, single-producer, multi-consumer (SPMC) queue, with a focus on reducing atomic contention through techniques like batching. Finally, the presentation addresses the challenges of profiling event-driven systems, recommending Clang XRay, and concludes with the crucial "You are not alone" principle, which illustrates how processes with no shared data can still degrade each other's performance through contention on the shared L3 CPU cache, emphasizing the need for a holistic approach to system performance.

Engineering Low-Latency Trading Systems in C++

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