This video details the process of reverse engineering a PIC12F683 microcontroller, focusing on two advanced sample preparation techniques: partial decapsulation and full delayering. The first half demonstrates a method for creating a top-down view of the silicon die while preserving its delicate copper bond wires. This is achieved by using a carefully formulated mixture of nitric and sulfuric acid, where the sulfuric acid acts as a dehydrating agent to promote a protective passivation layer on the copper. The second half of the video shifts to preparing bare dies for full analysis, followed by a meticulous, layer-by-layer removal of the chip's internal structure using iterative wet etching with hydrofluoric acid. The process, while challenging and time-consuming, successfully exposes all three metal layers and the underlying polysilicon, resulting in a complete, high-resolution dataset ready for circuit analysis.
Reverse Engineering the PIC12F683: From Decapsulation to Delayering
0:00:02 - The Goal: A Top-Down View: The primary objective is to expose the silicon die and its bond wires by partially decapsulating the chip. This allows for mapping the package pins to the die's bond pads and enables future semi-invasive analysis.
0:01:28 - The Challenge: Protecting Copper Bond Wires: Modern chips use copper bond wires, which are easily destroyed by the standard nitric acid used for decapsulation. The packaging material itself is a tough composite of epoxy and silica filler.
0:05:47 - The Solution: A Sulfuric/Nitric Acid Mix: To protect the copper, concentrated sulfuric acid is mixed with 70% nitric acid. The sulfuric acid acts as a dehydrating agent, creating an environment that encourages the formation of a protective (passivation) layer on the copper, preventing it from dissolving while the epoxy is etched away.
0:09:27 - Meticulous Sample Preparation: The chip is mounted on a heatsink and a removable masking material is applied to create a precise "well" for the acid. This ensures the etching is localized, protecting the rest of the package and its leads.
0:12:37 - The Etching Process in Action: The process involves multiple cycles of applying the acid mixture to the heated sample, allowing it to react, and then rinsing with acetone. This iterative approach allows for careful control over the etch depth.
0:20:43 - Revealing the Die: Under the microscope, the successfully exposed die shows intact bond wires and various features, including power rings, dummy fill patterns, the Microchip logo, and specific mask ID codes (e.g., DE024).
0:28:47 - Preparing Bare Dies for Delayering: To analyze the chip's internal layers, the entire package must be removed. This is done in a separate, more aggressive batch process where multiple chips are submerged in nitric acid to yield bare silicon dies.
0:33:03 - The Theory of Delayering: The next goal is to strip away the chip's layers (three metal, one polysilicon) one by one. The video explains that this will be done with hydrofluoric acid (HF), a wet etchant that attacks the silicate dielectric between the metal layers.
0:41:59 - An Intensive Imaging Effort: The delayering process was a significant undertaking, requiring 27 separate etch cycles over two weeks and resulting in a massive 203.5 GB dataset from nearly 370,000 photos.
0:42:23 - Key Takeaway & Next Steps: The intensive work pays off, creating a complete, transistor-level image of the entire chip on every layer. This comprehensive dataset paves the way for a full circuit analysis and reverse engineering in the next part of the series.