This video is the first part of a series detailing the in-depth reverse engineering of a Microchip PIC 12F683 8-bit microcontroller, conducted entirely within a well-equipped home lab. The focus of this installment is the meticulous process of preparing a metallographic cross-section of the device to reveal its internal physical construction. The process begins with embedding the chip, housed in a DFN package, into an acrylic resin mold. This is followed by a multi-stage mechanical polishing procedure using progressively finer abrasives, from coarse silicon carbide paper down to a final mirror polish with 1-micron diamond and 50nm colloidal alumina suspensions. The resulting cross-section is then analyzed under a high-power optical microscope. This analysis successfully visualizes the die's internal structure, including the three aluminum metal layers, the copper ball bonds and their ultrasonic weld interface with the aluminum pads, the die's protective seal ring, and the silver epoxy die attach. A key manufacturing insight is discovered: the package's external copper paddle was tin-plated after the molding process was completed.
A Step-by-Step Guide to Microchip Cross-Sectioning
0:00:03 - Project Goal: The creator introduces a multi-part series to perform a deep-dive circuit analysis on a PIC 12F683 microcontroller, a chip he first broke the security on in 2011. The entire analysis will be performed using home lab equipment.
0:01:52 - Target Device: The subject is a Microchip PIC 12F683, an 8-bit microcontroller built on a 350nm process with three aluminum metal layers. The specific package is a Dual Flat No-leads (DFN).
0:04:38 - Cross-Section Strategy: The initial step is to perform a mechanical cross-section to understand the physical packaging. The polishing plane is chosen to cut through a row of bond pads, maximizing the chance of seeing multiple wire bonds.
0:08:09 - Sample Preparation: The chip is mounted on its side in a clip and embedded in a two-part acrylic resin. The process of measuring, mixing, and pouring the resin into a mold is shown.
0:11:26 - Mechanical Polishing: The cured resin puck is polished on a lapping machine. The process starts with coarse silicon carbide paper (P180) to remove bulk material and progresses through much finer grits (up to P2500) to slowly and carefully approach the silicon die without causing cracks.
0:17:00 - Final Mirror Polish: To achieve a surface finish suitable for high-magnification microscopy, the sample undergoes a final polish, first with a 1-micron diamond suspension and then with a 50nm colloidal alumina suspension.
0:20:06 - Microscopic Analysis: The finished, mirror-polished cross-section is placed under a microscope, and a high-resolution automated scan of the entire die area is performed.
0:21:35 - Internal Structures Revealed: The analysis clearly shows the internal construction, including the die's seal ring (to prevent delamination), the three aluminum metal layers, and the underlying polysilicon.
0:22:31 - Copper Ball Bond Examination: A close-up view reveals the copper ball bonds attached to the die. The creator explains they are essentially friction-stir welded using ultrasonic vibrations, which slightly deforms the top aluminum layer of the bond pad.
0:24:13 - Die Attach and Manufacturing Insight: The cross-section shows the silver-filled epoxy that bonds the silicon die to the copper paddle for thermal and electrical connection. It also reveals that the paddle's tin plating extends over the molding compound, indicating the chip was encapsulated before plating.
0:24:55 - Coming Up in Part 2: The video concludes, teasing the next part where the chip will be fully decapsulated to begin analyzing the top-down view of the circuitry.